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Commit message (Expand)AuthorAgeFilesLines
* gas: Add --gdwarf-cie-version command line flagAndrew Burgess2019-11-181-0/+17
* x86: fold individual Jump* attributes into a single Jump oneJan Beulich2019-11-141-0/+8
* x86: make JumpAbsolute an insn attributeJan Beulich2019-11-141-0/+10
* x86: make AnySize an insn attributeJan Beulich2019-11-141-0/+4
* x86/Intel: correct CMPSD test cases' regexp closing paren placementJan Beulich2019-11-141-0/+6
* x86/Intel: extend MOVSD/CMPSD testsuite coverageJan Beulich2019-11-141-0/+12
* RISC-V: Support the INSN_CLASS.*F.* classes for .insn directive.Jim Wilson2019-11-121-0/+4
* [gas][arm] Enable VLDM, VSTM, VPUSH, VPOP for MVEMihail Ionescu2019-11-121-0/+15
* [binutils][arm] Update the decoding of MVE VMOV, VMVNMihail Ionescu2019-11-121-0/+6
* [gas][arm] Make .fpu reset the FPU/Coprocessor feature bitsMihail Ionescu2019-11-121-0/+8
* x86: fold EsSeg into IsStringJan Beulich2019-11-121-0/+8
* x86: eliminate ImmExt abuseJan Beulich2019-11-121-0/+16
* x86: introduce operand type "instance"Jan Beulich2019-11-121-0/+11
* Arm64: SVE2's smaxp/sminp require operands 1 and 3 to be the same registerJan Beulich2019-11-111-0/+6
* i386: Only check suffix in instruction mnemonicH.J. Lu2019-11-081-0/+9
* x86: convert RegMask and RegBND from bitfield to enumeratorJan Beulich2019-11-081-0/+6
* x86: convert RegSIMD and RegMMX from bitfield to enumeratorJan Beulich2019-11-081-0/+8
* x86: convert Control/Debug/Test from bitfield to enumeratorJan Beulich2019-11-081-0/+6
* x86: convert SReg from bitfield to enumeratorJan Beulich2019-11-081-0/+8
* x86: introduce operand type "class"Jan Beulich2019-11-081-0/+14
* [gas][aarch64] Add the v8.6 Data Gathering Hint mnemonic [10/X]Matthew Malcomson2019-11-071-0/+5
* [Patch][binutils][arm] Armv8.6-A Matrix Multiply extension [9/10]Matthew Malcomson2019-11-071-0/+18
* [binutils][aarch64] Matrix Multiply extension enablement [8/X]Matthew Malcomson2019-11-071-0/+13
* [Patch][binutils][aarch64] .bfloat16 directive for AArch64 [7/10]Matthew Malcomson2019-11-071-0/+8
* [Patch][binutils][arm] .bfloat16 directive for Arm [6/X]Matthew Malcomson2019-11-071-0/+8
* [Patch][binutils] Generic support for parsing numbers in bfloat16 format [5/X]Matthew Malcomson2019-11-071-0/+8
* [binutils][arm] BFloat16 enablement [4/X]Matthew Malcomson2019-11-071-0/+44
* [binutils][aarch64] Bfloat16 enablement [2/X]Matthew Malcomson2019-11-071-0/+14
* [gas][aarch64] Armv8.6-a option [1/X]Matthew Malcomson2019-11-071-0/+6
* x86: support further AMD Zen2 instructionsJan Beulich2019-11-071-0/+15
* x86: adjust register names printed for MONITOR/MWAITJan Beulich2019-11-071-0/+19
* x86: re-arrange process_operands()Jan Beulich2019-11-041-0/+5
* i386; Add .code16gcc fldenv testsH.J. Lu2019-10-311-0/+5
* Add support for context sensitive '.arch_extension' to the ARM assembler.Mihail Ionescu2019-10-311-0/+12
* Modify the ARNM assembler to accept the omission of the immediate argument fo...Delia Burduv2019-10-301-0/+12
* x86: add tests to cover defaulting of operand sizes for ambiguous insnsJan Beulich2019-10-301-0/+7
* x86: drop stray WJan Beulich2019-10-301-0/+5
* Re: Optimise away eh_frame advance_loc 0Alan Modra2019-10-291-0/+6
* Add some missing casts to suppress implicit cast warningsJohn David Anglin2019-10-261-0/+6
* Optimise away eh_frame advance_loc 0Alan Modra2019-10-261-0/+10
* PR25125, relaxation chooses wrong branch sizeAlan Modra2019-10-251-0/+9
* qsort: tc-xtensa.c tidyAlan Modra2019-10-161-0/+7
* remove more xmalloc in bfdAlan Modra2019-10-151-0/+6
* Fix the disassembly of the LDS and STS instructions of the AVR architecture.Nick Clifton2019-10-091-0/+6
* Add support for new functionality in the msp430 backend of GCC.Jozef Lawrynowicz2019-10-071-0/+24
* add missing ChangeLog entry for d241b91073Jan Beulich2019-10-071-0/+13
* Arm: Fix out of range conditional branch (PR/24991)Tamar Christina2019-09-241-0/+11
* ecoff bfd.h tidyAlan Modra2019-09-231-0/+5
* arm bfd.h tidyAlan Modra2019-09-231-0/+4
* tc-i386.c gcc10 warning fixAlan Modra2019-09-211-0/+4