DEFINED_PHASES=install prepare
DEPEND=app-arch/bzip2 sys-libs/readline sys-libs/zlib
DESCRIPTION=A Verilog simulation and synthesis tool
EAPI=4
HOMEPAGE=http://iverilog.icarus.com/
IUSE=examples
KEYWORDS=~amd64 ~ppc ~sparc ~x86
LICENSE=GPL-2
RDEPEND=app-arch/bzip2 sys-libs/readline sys-libs/zlib
SLOT=0
SRC_URI=ftp://icarus.com/pub/eda/verilog/v0.9/verilog-0.9.7.tar.gz
_eclass_exported_funcs=src_prepare:- src_install:-
_eclasses_=eutils	b83a2420b796f7c6eff682679d08fe25	multilib	165fc17c38d1b11dac2008280dab6e80	toolchain-funcs	6198c04daba0e1307bd844df7d37f423
_md5_=5cb9321581cbdba38e4cd4887b1e1f3c