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* TCG variable type checking.pbrook2008-11-171-102/+116
| | | | | | | Signed-off-by: Paul Brook <paul@codesourcery.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5729 c046a42c-6fe2-441c-8c8c-71466251a162
* VFP fnmsc negative zero fix.pbrook2008-11-031-2/+2
| | | | | | | Signed-off-by: Paul Brook <paul@codesourcery.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5610 c046a42c-6fe2-441c-8c8c-71466251a162
* Fix undeclared symbol warnings from sparseblueswir12008-10-261-1/+1
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5539 c046a42c-6fe2-441c-8c8c-71466251a162
* Additional exclusive load/store instruction are v6K, not v6T2.pbrook2008-10-221-1/+1
| | | | | | | Signed-off-by: Paul Brook <paul@codesourcery.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5518 c046a42c-6fe2-441c-8c8c-71466251a162
* Fix ARMv6t2 strex instructions.pbrook2008-10-221-3/+45
| | | | | | | Signed-off-by: Paul Brook <paul@codesourcery.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5517 c046a42c-6fe2-441c-8c8c-71466251a162
* Fix ARM NEON vdup and vtbl bugs.pbrook2008-09-221-4/+6
| | | | | | | Signed-off-by: Paul Brook <paul@codesourcery.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5286 c046a42c-6fe2-441c-8c8c-71466251a162
* Fix neon encoding comment.pbrook2008-09-211-1/+1
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5285 c046a42c-6fe2-441c-8c8c-71466251a162
* Add concat_i32_i64 op.pbrook2008-09-211-22/+13
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5280 c046a42c-6fe2-441c-8c8c-71466251a162
* Fix QADD / QSUB decoding on ARM (Torbjörn Andersson).balrog2008-09-201-1/+1
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5273 c046a42c-6fe2-441c-8c8c-71466251a162
* Fix some warnings that would be generated by gcc -Wredundant-declsblueswir12008-08-301-4/+1
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5115 c046a42c-6fe2-441c-8c8c-71466251a162
* ARM: fix CPS masks (Vincent Palatin).balrog2008-07-191-2/+2
| | | | | | | | | | According to ARM Reference Manual (DDI0100 A4.1.16), bit 5 is fixed to 0 (bit 4 is the MSB of the mode), so the instruction mask should be 0x0ff10020 not 0x0ff10010. Besides, mmod flag is bit 17 (b14 is SBZ) git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4899 c046a42c-6fe2-441c-8c8c-71466251a162
* Fix smlald, smlsld, pkhtp, pkhbt, ssat, usat, umul, smul... (Laurent Desnogues).balrog2008-07-191-13/+18
| | | | | | | | | | | | | | | | | | | | | | | | helper.c - copy reference c0_c2 to runtime c0_c2 and not c0_c1 op_helper.c - remove old code (PARAM1, probably some left over from old dyngen) that broke do_[us]sat translate.c - gen_smul_dual should sign-extend from 16 bit to 32 bit and not from 8 to 32 - disas_arm_insn: * smlalxy: that was completely wrong; now the addition is performed as for smlald * pkhtb: optional ASR not taken into account (similar * to [us]sat) * pkhtb/pkhbt: tmp2 is dead * smlald, smlsld, smuad, smusd, smlad, smlsd: rd * and rn swapped git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4898 c046a42c-6fe2-441c-8c8c-71466251a162
* Small cleanup of gen_intermediate_code(_internal), by Laurent Desnogues.ths2008-07-181-8/+7
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4891 c046a42c-6fe2-441c-8c8c-71466251a162
* Terminate TB immediately after v7-M exception return.pbrook2008-07-111-0/+2
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4868 c046a42c-6fe2-441c-8c8c-71466251a162
* Convert remaining __builtin_expect to likely/unlikely, by Jan Kiszka.ths2008-07-031-2/+2
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4840 c046a42c-6fe2-441c-8c8c-71466251a162
* Silence compiler warning.ths2008-07-031-0/+2
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4839 c046a42c-6fe2-441c-8c8c-71466251a162
* Spelling fixes, spotted by Stuart Brady.ths2008-06-301-1/+1
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4809 c046a42c-6fe2-441c-8c8c-71466251a162
* Suppress bogus compiler warnings.pbrook2008-06-291-0/+11
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4803 c046a42c-6fe2-441c-8c8c-71466251a162
* Add instruction counter.pbrook2008-06-291-1/+30
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4799 c046a42c-6fe2-441c-8c8c-71466251a162
* Mark a dead_tmp as such in ARM msr.balrog2008-06-021-0/+1
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4648 c046a42c-6fe2-441c-8c8c-71466251a162
* Implement ARM magic kernel page and TLS register.pbrook2008-05-291-1/+10
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4610 c046a42c-6fe2-441c-8c8c-71466251a162
* Fix ARM conditional branch bug.pbrook2008-05-241-29/+25
| | | | | | | Add tcg_gen_brcondi. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4552 c046a42c-6fe2-441c-8c8c-71466251a162
* Remove arm's local not_i32 tcg op now that there's one in tcg.balrog2008-05-171-6/+0
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4475 c046a42c-6fe2-441c-8c8c-71466251a162
* Add TCG native negation op.pbrook2008-05-111-7/+1
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4426 c046a42c-6fe2-441c-8c8c-71466251a162
* Add zero extension (pseudo-)ops.pbrook2008-05-111-9/+9
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4424 c046a42c-6fe2-441c-8c8c-71466251a162
* Factorize code in translate.caurel322008-04-281-0/+5
| | | | | | | (Glauber Costa) git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4274 c046a42c-6fe2-441c-8c8c-71466251a162
* Remove an unused field and fix some non-code typos.balrog2008-04-201-2/+2
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4222 c046a42c-6fe2-441c-8c8c-71466251a162
* Correct more ARM VFP 32/64 and signed/unsigned typos.balrog2008-04-201-2/+2
| | | | | | | Fixes unreadable fonts in Maemo guest. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4221 c046a42c-6fe2-441c-8c8c-71466251a162
* Save the exact SWI return address in Thumb mode.balrog2008-04-161-1/+1
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4217 c046a42c-6fe2-441c-8c8c-71466251a162
* Correctly restore pc after an exception occured in Thumb mode.balrog2008-04-141-6/+1
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4211 c046a42c-6fe2-441c-8c8c-71466251a162
* Fix ARM VFP related segfaults.balrog2008-04-141-4/+4
| | | | | | | | | The fconst change is partly a guess. VFP_OP1 is still unused. An ARMv6 target still won't boot. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4210 c046a42c-6fe2-441c-8c8c-71466251a162
* Fix the offset in Thumb bl instruction.balrog2008-04-131-3/+3
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4204 c046a42c-6fe2-441c-8c8c-71466251a162
* Set an unset label in ARM strex.balrog2008-04-131-0/+1
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4203 c046a42c-6fe2-441c-8c8c-71466251a162
* Fix ARM and Thumb ldlex/stlex.balrog2008-04-131-0/+2
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4202 c046a42c-6fe2-441c-8c8c-71466251a162
* Store the right TCG temp (typo).balrog2008-04-131-2/+2
| | | | | | | Stops ARMv6 target from segfaulting early. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4201 c046a42c-6fe2-441c-8c8c-71466251a162
* ARM N=Z=1 flag fix.pbrook2008-04-011-14/+16
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4156 c046a42c-6fe2-441c-8c8c-71466251a162
* ARM TCG conversion 15/16.pbrook2008-03-311-67/+333
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4152 c046a42c-6fe2-441c-8c8c-71466251a162
* ARM TCG conversion 14/16.pbrook2008-03-311-820/+818
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4151 c046a42c-6fe2-441c-8c8c-71466251a162
* ARM TCG conversion 13/16.pbrook2008-03-311-140/+171
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4150 c046a42c-6fe2-441c-8c8c-71466251a162
* ARM TCG conversion 12/16.pbrook2008-03-311-74/+94
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4149 c046a42c-6fe2-441c-8c8c-71466251a162
* ARM TCG conversion 11/16.pbrook2008-03-311-202/+289
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4148 c046a42c-6fe2-441c-8c8c-71466251a162
* ARM TCG conversion 10/16.pbrook2008-03-311-105/+229
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4147 c046a42c-6fe2-441c-8c8c-71466251a162
* ARM TCG conversion 9/16.pbrook2008-03-311-330/+424
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4146 c046a42c-6fe2-441c-8c8c-71466251a162
* ARM TCG conversion 8/16.pbrook2008-03-311-187/+348
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4145 c046a42c-6fe2-441c-8c8c-71466251a162
* ARM TCG conversion 7/16.pbrook2008-03-311-91/+149
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4144 c046a42c-6fe2-441c-8c8c-71466251a162
* ARM TCG conversion 6/16.pbrook2008-03-311-32/+137
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4143 c046a42c-6fe2-441c-8c8c-71466251a162
* ARM TCG conversion 5/16.pbrook2008-03-311-11/+64
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4142 c046a42c-6fe2-441c-8c8c-71466251a162
* ARM TCG conversion 4/16.pbrook2008-03-311-13/+21
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4141 c046a42c-6fe2-441c-8c8c-71466251a162
* ARM TCG conversion 3/16.pbrook2008-03-311-70/+65
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4140 c046a42c-6fe2-441c-8c8c-71466251a162
* ARM TCG conversion 2/16.pbrook2008-03-311-0/+3
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4139 c046a42c-6fe2-441c-8c8c-71466251a162