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| author |   j_mayer <j_mayer@c046a42c-6fe2-441c-8c8c-71466251a162> | 2007-10-14 07:07:08 +0000 |
|---|---|---|
| committer | j_mayer <j_mayer@c046a42c-6fe2-441c-8c8c-71466251a162> | 2007-10-14 07:07:08 +0000 |
| commit | 6ebbf390003270afece028facef4d9834df81a8c (patch) | |
| tree | adc8e9a3d586d5b1b550543fceb6ffdaeda03f6a /cpu-defs.h | |
| parent | Update TODO. (diff) | |
| download | qemu-kvm-6ebbf390003270afece028facef4d9834df81a8c.tar.gz qemu-kvm-6ebbf390003270afece028facef4d9834df81a8c.tar.bz2 qemu-kvm-6ebbf390003270afece028facef4d9834df81a8c.zip | |
Replace is_user variable with mmu_idx in softmmu core,
allowing support of more than 2 mmu access modes.
Add backward compatibility is_user variable in targets code when needed.
Implement per target cpu_mmu_index function, avoiding duplicated code
and #ifdef TARGET_xxx in softmmu core functions.
Implement per target mmu modes definitions. As an example, add PowerPC
hypervisor mode definition and Alpha executive and kernel modes definitions.
Optimize PowerPC case, precomputing mmu_idx when MSR register changes
and using the same definition in code translation code.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3384 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'cpu-defs.h')
| -rw-r--r-- | cpu-defs.h | 9 |
1 files changed, 0 insertions, 9 deletions
diff --git a/cpu-defs.h b/cpu-defs.h index 915877617..86557e442 100644 --- a/cpu-defs.h +++ b/cpu-defs.h @@ -112,15 +112,6 @@ typedef struct CPUTLBEntry { target_phys_addr_t addend; } CPUTLBEntry; -/* Alpha has 4 different running levels */ -#if defined(TARGET_ALPHA) -#define NB_MMU_MODES 4 -#elif defined(TARGET_PPC64H) /* PowerPC 64 with hypervisor mode support */ -#define NB_MMU_MODES 3 -#else -#define NB_MMU_MODES 2 -#endif - #define CPU_COMMON \ struct TranslationBlock *current_tb; /* currently executing TB */ \ /* soft mmu support */ \ |